光耦的熱特性
This phenomenon is shown graphically in Figures 3a-c by the package temperature profile and strong heat flux contours evident in the die, lead frame, and board via. Because very little heat leaves through the top of the package, the top case temperature is a poor indicator of junction temperature. This means that the majority of the heat is transferred to the board, and very little heat is transferred to the air via the case, which can be verified in the thermal network.
Therefore, θDC and θEC can be removed from the thermal model (Figure 2). In this situation, the critical package thermal resistances become θDE, θDB, and θEB. θBA is the thermal resistance from the board to the ambient, and is primarily driven by the geometry and composition of the board. The type of board design used defines this characteristic. Junction-to-case thermal resistances are removed based on the fact that very little heat is leaving through the top of the package (Figure 4).
Thermal to Electrical Analogy
The thermal-resistance characteristic defines the steady-state temperature difference between two points at a given rate of heat-energy transfer (dissipation) between the points. The temperature difference in a thermal-resistance system in an analog to an electrical circuit, where thermal resistance is equivalent to electrical resistance, is equivalent to the voltage difference, and the rate of heat-energy transfer (dissipation) is equivalent to the current (Table 1).
In a thermal circuit, a constant current source represents power dissipation. This is because generated heat must flow (steady-state) from higher temperatures to lower temperatures, regardless of the resistance in its path.
Assuming that you know or can estimate the power dissipated from the detector and the emitter (LED) and the temperature of the board and ambient, you can calculate the node temperatures by solving the network equations. If you desire to use the complete thermal resistance model, a more complex set of network equations will need to be solved.
The network equations will provide you with an estimate of what the operating temperature(s) would be before the specific environment is known. As an example, Figure 5 illustrates the analogous electrical model for calculating the temperature at both detector and emitter junctions, given a set of thermal resistances at room temperature with 50 mW on the emitter (PE) and 500 mW on the detector (PD). In order to write an equation to calculate the node temperatures, we will need to assume some heat flow directions (Figure 5). Based on Figure 5, the following equations will calculate the node temperatures:
PDE + PDB + PEC = PE (1)
- PDE + PDB + PDC = PD (2)
TB - TJD + θDB x PDB = 0 (3)
TB - TJE + θEB x PEB = 0 (4)
TJE - TJD + θDE x PDE = 0 (5)
TB - θBA x (PEB + PDB) = TA (6)
TC - θCA x (PEC + PDC) = TA (7)
TC - TJD + θDC x PDC = 0 (8)
TC - TJE + θEC x PEC = 0 (9)
Where:
PDB = Power dissipation, detector junction to board
PDE = Power dissipation, detector to emitter
PEB = Power dissipation, emitter junction to board
PDC = Power dissipation, detector junction to Case
PEC = Power dissipation, emitter junction to Case
When the simplified thermal model is used, equations 7-9 do not play any role in the node temperature calculation, and equations 1 and 2 are simplified to equations 1' and 2'. Figure 6a shows a simplified thermal circuit model. Since θCA, θEC, and θDC are not included in the simplified thermal model, all equations that include these resistances (equations 7-9) can be excluded for node temperature calculation. When TA is known, the following equations will calculate the node temperatures:
PDE + PDB = PE (1')
- PDE + PDB = PD (2')
TB - TJD + θDB x PDB = 0 (3)
TB - TJE + θEB x PEB = 0 (4)
TJE - TJD + θDE x PDE = 0 (5)
TB - θBA x (PEB + PDB) = TA (6)
For a desired TB and/or when only TB is known, Figure 6a is further simplified (Figure 6b). When TB is given, θBA does not play any role in calculating the node temperature, and any equation(s) that includes θBA can be eliminated. Based on Figure 6, the following equations will calculate the node temperatures when only TB is known:
PDE + PDB = PE (1')
- PDE + PDB = PD (2')
TB - TJD + θDB x PDB = 0 (3)
TB - TJE + θEB x PEB = 0 (4)
TJE - TJD + θDE x PDE = 0 (5)
Example 1:
Based on our characterization, Table 2 shows the thermal resistances for a simplified 6-pin dip package optocoupler. As the θBA is dependent upon the material, number of layers, and thickness of the board used, the optocouplers in our analysis were mounted on 2- and 4-layer boards with a thickness of 4 mm. Obviously, the θBA for the two different boards are different (Table 2).
Using equations 1'-2' and 3-6, Table 2's thermal resistances, and assuming Figure 6a's emitter and detector power dissipations, Table 3 shows the node temperatures when TA is known.
Example 2:
You can use the complete thermal model to calculated node temperatures. However, the results would not vary drastically from thermal calculation based on the simplified model for most products and i n most environments. Hence, it is entirely up you to decide how accurate the results are needed for each individual deign. Table 4 provides all thermal resistances for 6-in dip package phototriac.
Using equations 1-9, Table 4's thermal resistances, and assuming Figure 5's emitter and detector power dissipations, Table 5 shows the node temperatures when TA is known.
Regardless of the package size and type, the thermal analysis will need to be performed to ensure a solid design. To aid this process, Vishay provides detailed thermal characteristics for newly released optocouplers and solid-state relays (SSRs) that have total power dissipation of 200 mW and higher. This thermal data supplied allows you to more accurately simulate heat distribution and thermal impedance for optocoupler and SSR devices and thus avoid the problems that can arise when thermal parameters are exceeded.
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