stm32的串口空閑中斷接收數(shù)據(jù)
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1、后臺(tái)數(shù)據(jù)->USART1-> USART2->其它設(shè)備，其它設(shè)備數(shù)據(jù)->USART2-> USART1->后臺(tái)，這兩個(gè)數(shù)據(jù)過程也可能同時(shí)進(jìn)行。
本文引用地址：http://butianyuan.cn/article/201611/318044.htm2、由于硬件的限制，USART1和USART2的傳輸波特率不一樣，比如USART1使用GPRS通信，USART2使用短距離無(wú)線通信；或者USART1使用以太網(wǎng)通信，USART2使用485總線通信。
現(xiàn)在我把我實(shí)現(xiàn)的過程簡(jiǎn)單描述一下：
1、 初始化設(shè)置：USART1_RX DMA1_ Channel5，USART2_RX DMA1_ Channel6，USART1_TX DMA1_ Channel4，USART2_TX DMA1_ Channel7（具體設(shè)置請(qǐng)看程序包）2、 當(dāng)數(shù)據(jù)發(fā)送給USART1接收完畢時(shí)候會(huì)引起USART1的串口總線中斷，計(jì)算DMA1_ Channel5內(nèi)存數(shù)組剩余容量，得到接收的字符長(zhǎng)度。將接收的字符給DMA1_ Channel4內(nèi)存數(shù)組，啟動(dòng)DMA1_ Channel4通道傳輸數(shù)據(jù)，（傳輸完成需要關(guān)閉。）下一次數(shù)據(jù)接收可以在啟動(dòng)DMA1_ Channel4時(shí)候就開始，不需要等待DMA1_ Channel4數(shù)據(jù)傳輸完成。但是上一次DMA1_ Channel4完成之前，不可以將數(shù)據(jù)給DMA1_ Channel4內(nèi)存數(shù)組，會(huì)沖掉以前數(shù)據(jù)。
3、 USART2類同USART1。
源程序：
IO口定義：void GPIO_Configuration(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
/* 第1步：打開GPIO和USART部件的時(shí)鐘 */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_AFIO, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
/* 第2步：將USART Tx的GPIO配置為推挽復(fù)用模式 */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOA, &GPIO_InitStructure);
/* 第3步：將USART Rx的GPIO配置為浮空輸入模式
由于CPU復(fù)位后，GPIO缺省都是浮空輸入模式，因此下面這個(gè)步驟不是必須的
但是，我還是建議加上便于閱讀，并且防止其它地方修改了這個(gè)口線的設(shè)置參數(shù)
*/
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
GPIO_Init(GPIOA, &GPIO_InitStructure);
/* 第1步：打開GPIO和USART2部件的時(shí)鐘 */
//RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_AFIO, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
/* 第2步：將USART2 Tx的GPIO配置為推挽復(fù)用模式 */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOA, &GPIO_InitStructure);
/* 第3步：將USART2 Rx的GPIO配置為浮空輸入模式
由于CPU復(fù)位后，GPIO缺省都是浮空輸入模式，因此下面這個(gè)步驟不是必須的
但是，我還是建議加上便于閱讀，并且防止其它地方修改了這個(gè)口線的設(shè)置參數(shù)
*/
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
GPIO_Init(GPIOA, &GPIO_InitStructure);
/* 第3步已經(jīng)做了，因此這步可以不做
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
*/
GPIO_Init(GPIOA, &GPIO_InitStructure);
}
串口初始化：void USART_Configuration(void)
{
USART_InitTypeDef USART_InitStructure;
/* 第4步：配置USART參數(shù)
- BaudRate = 115200 baud
- Word Length = 8 Bits
- On
- No parity
- Hardware flow control disabled (RTS and CTS signals)
- Receive and transmit enabled
*/
USART_InitStructure.USART_BaudRate = 19200;
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
USART_InitStructure.USART_StopBits = USART_StopBits_1;
USART_InitStructure.USART_Parity = USART_Parity_No;
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
USART_Init(USART1, &USART_InitStructure);
//配置USART1空閑中斷USART_ITConfig(USART1, USART_IT_IDLE , ENABLE);
/* 第5步：使能 USART， 配置完畢 */USART_Cmd(USART1, ENABLE);
/* CPU的小缺陷：串口配置好，如果直接Send，則第1個(gè)字節(jié)發(fā)送不出去
如下語(yǔ)句解決第1個(gè)字節(jié)無(wú)法正確發(fā)送出去的問題 */
USART_ClearFlag(USART1, USART_FLAG_TC);/* 清發(fā)送完成標(biāo)志，Transmission Complete flag */
USART_InitStructure.USART_BaudRate = 9600;
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
USART_InitStructure.USART_StopBits = USART_StopBits_1;
USART_InitStructure.USART_Parity = USART_Parity_No;
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
USART_Init(USART2, &USART_InitStructure);
//配置USART2空閑中斷
USART_ITConfig(USART2, USART_IT_IDLE , ENABLE);USART_Cmd(USART2, ENABLE);
/* CPU的小缺陷：串口配置好，如果直接Send，則第1個(gè)字節(jié)發(fā)送不出去
如下語(yǔ)句解決第1個(gè)字節(jié)無(wú)法正確發(fā)送出去的問題 */
USART_ClearFlag(USART2, USART_FLAG_TC);/* 清發(fā)送外城標(biāo)志，Transmission Complete flag */
}
DMA配置：void DMA_Configuration(void)
{
DMA_InitTypeDef DMA_InitStructure;
/* DMA clock enable */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);//開啟DMA1外設(shè)時(shí)鐘
/* DMA1 Channel4 (triggered by USART1 Tx event) Config */
DMA_DeInit(DMA1_Channel4);
DMA_InitStructure.DMA_PeripheralBaseAddr = 0x40013804;
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)USART1_SEND_DA
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
DMA_InitStructure.DMA_BufferSize = 512;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;//循環(huán)模式
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_Init(DMA1_Channel4, &DMA_InitStructure);
DMA_ITConfig(DMA1_Channel4, DMA_IT_TC, ENABLE);
DMA_ITConfig(DMA1_Channel4, DMA_IT_TE, ENABLE);
/* Enable USART1 DMA TX request */
USART_DMACmd(USART1, USART_DMAReq_Tx, ENABLE);
DMA_Cmd(DMA1_Channel4, DISABLE);
/* DMA1 Channel5 (triggered by USART2 Tx event) Config */
DMA_DeInit(DMA1_Channel7);
DMA_InitStructure.DMA_PeripheralBaseAddr = 0x40004404;
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)USART2_SEND_DA
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
DMA_InitStructure.DMA_BufferSize = 512;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_Init(DMA1_Channel7, &DMA_InitStructure);
DMA_ITConfig(DMA1_Channel7, DMA_IT_TC, ENABLE);
DMA_ITConfig(DMA1_Channel7, DMA_IT_TE, ENABLE);
/* Enable USART1 DMA TX request */
USART_DMACmd(USART2, USART_DMAReq_Tx, ENABLE);
DMA_Cmd(DMA1_Channel7, DISABLE);
/* DMA1 Channel5 (triggered by USART1 Rx event) Config */
DMA_DeInit(DMA1_Channel5);
DMA_InitStructure.DMA_PeripheralBaseAddr = 0x40013804;
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)USART1_RECEIVE_DA
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
DMA_InitStructure.DMA_BufferSize = 512;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_Init(DMA1_Channel5, &DMA_InitStructure);
DMA_ITConfig(DMA1_Channel5, DMA_IT_TC, ENABLE);
DMA_ITConfig(DMA1_Channel5, DMA_IT_TE, ENABLE);
/* Enable USART1 DMA RX request */
USART_DMACmd(USART1, USART_DMAReq_Rx, ENABLE);
DMA_Cmd(DMA1_Channel5, ENABLE);
/* DMA1 Channel6 (triggered by USART1 Rx event) Config */
DMA_DeInit(DMA1_Channel6);
DMA_InitStructure.DMA_PeripheralBaseAddr = 0x40004404;
DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)USART2_RECEIVE_DA
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
DMA_InitStructure.DMA_BufferSize = 512;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_Init(DMA1_Channel6, &DMA_InitStructure);
DMA_ITConfig(DMA1_Channel6, DMA_IT_TC, ENABLE);
DMA_ITConfig(DMA1_Channel6, DMA_IT_TE, ENABLE);
/* Enable USART2 DMA RX request */
USART_DMACmd(USART2, USART_DMAReq_Rx, ENABLE);
DMA_Cmd(DMA1_Channel6, ENABLE);
}
中斷優(yōu)先級(jí)配置：void NVIC_Configuration(void)
{
NVIC_InitTypeDef NVIC_InitStructure;
/* Configure on
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
/* Enable the USART1 Interrupt */
NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
/* Enable the USART2 Interrupt */
NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 2;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
//Enable DMA Channel4 Interrupt
NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel4_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
//Enable DMA Channel7 Interrupt
NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel7_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 2;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
/*Enable DMA Channel5 Interrupt */
NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel5_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
/*Enable DMA Channel6 Interrupt */
NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel6_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
}
數(shù)組定義，含義如題名：u8 USART1_SEND_DA
u8 USART2_SEND_DA
u8 USART1_RECEIVE_DA
u8 USART2_RECEIVE_DA
u8 USART1_TX_Finish=1;// USART1發(fā)送完成標(biāo)志量
u8 USART2_TX_Finish=1;// USART2發(fā)送完成標(biāo)志量
USART1中斷服務(wù)函數(shù)void USART1_IRQHandler(void)
{
u16 DA
u16 i;
if(USART_GetITStatus(USART1, USART_IT_IDLE) != RESET)//如果為空閑總線中斷
{
DMA_Cmd(DMA1_Channel5, DISABLE);//關(guān)閉DMA,防止處理其間有數(shù)據(jù)
//USART_RX_STA = USART1->SR;//先讀SR，然后讀DR才能清除
//USART_RX_STA = USART1->DR;
DA
if(DA
{
while(USART1_TX_Finish==0)//等待數(shù)據(jù)傳輸完成才下一次
{
;
}
//將數(shù)據(jù)送DMA存儲(chǔ)地址for(i=0;i
{
USART1_SEND_DA
}
//USART用DMA傳輸替代查詢方式發(fā)送，克服被高優(yōu)先級(jí)中斷而產(chǎn)生丟幀現(xiàn)象。
DMA_Cmd(DMA1_Channel4, DISABLE);//改變datasize前先要禁止通道工作
DMA1_Channel4->CNDTR=DA
USART1_TX_Finish=0;//DMA傳輸開始標(biāo)志量
DMA_Cmd(DMA1_Channel4, ENABLE);
}
//DMA_Cmd(DMA1_Channel5, DISABLE);//關(guān)閉DMA,防止處理其間有數(shù)據(jù)
DMA_ClearFlag(DMA1_FLAG_GL5 | DMA1_FLAG_TC5 | DMA1_FLAG_TE5 | DMA1_FLAG_HT5);//清標(biāo)志
DMA1_Channel5->CNDTR = 512;//重裝填
DMA_Cmd(DMA1_Channel5, ENABLE);//處理完,重開DMA
//讀SR后讀DR清除Idle
i = USART1->SR;
i = USART1->DR;
}
if(USART_GetITStatus(USART1, USART_IT_PE | USART_IT_FE | USART_IT_NE) != RESET)//出錯(cuò)
{
USART_ClearITPendingBit(USART1, USART_IT_PE | USART_IT_FE | USART_IT_NE);
}
USART_ClearITPendingBit(USART1, USART_IT_TC);
USART_ClearITPendingBit(USART1, USART_IT_IDLE);
}
USART2中斷服務(wù)函數(shù)void USART2_IRQHandler(void)
{
u16 DA
u16 i;
if(USART_GetITStatus(USART2, USART_IT_IDLE) != RESET)//如果為空閑總線中斷
{
DMA_Cmd(DMA1_Channel6, DISABLE);//關(guān)閉DMA,防止處理其間有數(shù)據(jù)
//USART_RX_STA = USART1->SR;//先讀SR，然后讀DR才能清除
//USART_RX_STA = USART1->DR;
DA
if(DA
{
while(USART2_TX_Finish==0)//等待數(shù)據(jù)完成才下一次
{
;
}
//將數(shù)據(jù)送DMA存儲(chǔ)地址
for(i=0;i
{
USART2_SEND_DA
}
//USART用DMA傳輸替代查詢方式發(fā)送，克服被高優(yōu)先級(jí)中斷而產(chǎn)生丟幀現(xiàn)象。
DMA_Cmd(DMA1_Channel7, DISABLE);//改變datasize前先要禁止通道工作
DMA1_Channel7->CNDTR=DA
USART2_TX_Finish=0;//DMA傳輸開始標(biāo)志量
DMA_Cmd(DMA1_Channel7, ENABLE);
}
//DMA_Cmd(DMA1_Channel5, DISABLE);//關(guān)閉DMA,防止處理其間有數(shù)據(jù)
DMA_ClearFlag(DMA1_FLAG_GL6 | DMA1_FLAG_TC6 | DMA1_FLAG_TE6 | DMA1_FLAG_HT6);//清標(biāo)志
DMA1_Channel6->CNDTR = 512;//重裝填
DMA_Cmd(DMA1_Channel6, ENABLE);//處理完,重開DMA
//讀SR后讀DR清除Idle
i = USART2->SR;
i = USART2->DR;
}
if(USART_GetITStatus(USART2, USART_IT_PE | USART_IT_FE | USART_IT_NE) != RESET)//出錯(cuò)
{
USART_ClearITPendingBit(USART2, USART_IT_PE | USART_IT_FE | USART_IT_NE);
}
USART_ClearITPendingBit(USART2, USART_IT_TC);
USART_ClearITPendingBit(USART2, USART_IT_IDLE);
}
DMA1_Channel5中斷服務(wù)函數(shù)void DMA1_Channel5_IRQHandler(void)
{
DMA_ClearITPendingBit(DMA1_IT_TC5);
DMA_ClearITPendingBit(DMA1_IT_TE5);
DMA_Cmd(DMA1_Channel5, DISABLE);//關(guān)閉DMA,防止處理其間有數(shù)據(jù)
DMA1_Channel5->CNDTR = 580;//重裝填
DMA_Cmd(DMA1_Channel5, ENABLE);//處理完,重開DMA
}
DMA1_Channel6中斷服務(wù)函數(shù)void DMA1_Channel6_IRQHandler(void)
{
DMA_ClearITPendingBit(DMA1_IT_TC6);
DMA_ClearITPendingBit(DMA1_IT_TE6);
DMA_Cmd(DMA1_Channel6, DISABLE);//關(guān)閉DMA,防止處理其間有數(shù)據(jù)
DMA1_Channel6->CNDTR = 580;//重裝填
DMA_Cmd(DMA1_Channel6, ENABLE);//處理完,重開DMA
}
DMA1_Channel4中斷服務(wù)函數(shù)//USART1使用DMA發(fā)數(shù)據(jù)中斷服務(wù)程序
void DMA1_Channel4_IRQHandler(void)
{
DMA_ClearITPendingBit(DMA1_IT_TC4);
DMA_ClearITPendingBit(DMA1_IT_TE4);
DMA_Cmd(DMA1_Channel4, DISABLE);//關(guān)閉DMA
USART1_TX_Finish=1;//置DMA傳輸完成
}
DMA1_Channel7中斷服務(wù)函數(shù)//USART2使用DMA發(fā)數(shù)據(jù)中斷服務(wù)程序
void DMA1_Channel7_IRQHandler(void)
{
DMA_ClearITPendingBit(DMA1_IT_TC7);
DMA_ClearITPendingBit(DMA1_IT_TE7);
DMA_Cmd(DMA1_Channel7, DISABLE);//關(guān)閉DMA
USART2_TX_Finish=1;//置DMA傳輸完成
}
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