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TITPS59650IntelIMVP-7系列處理器電源解決方案

作者: 時(shí)間:2012-05-11 來(lái)源:網(wǎng)絡(luò) 收藏
TI公司的TPS51650和TPS59650是集成了兩個(gè)柵極驅(qū)動(dòng)器的雙路 VID全兼容的IMVP-7降壓控制器,支持CPU和GPU輸出,CPU通路具有一相,二相或三相,GPU通路具有一相或二相,8位 AC具有0.250V到1.52V的輸出,轉(zhuǎn)換電壓范圍3V到28V,主要用在IMVP-7 VCORE以及適配器,電池,NVDC或3V,5V和12V電源.本文介紹了TPS51650和TPS59650主要特性,方框圖,多種典型應(yīng)用電路,以及TPS59650EVM-753評(píng)估模塊主要特性和指標(biāo),方框圖,電路,材料清單和PCB元件布局圖.

The TPS51650 and TPS59650 are dual-channel, fully SVID compliant IMVP-7 step-down controllers with two integrated gate drivers. Advanced control features such as D-CAP+ architecture with overlapping pulse support (undershoot reduction, USR) and overshoot reduction (OSR) provide fast transient response, lowest output capacitance and high efficiency. All of these controllers also support single-phase operation for light loads. The full compliment of IMVP-7 I/O is integrated into the controllers including dual PGOOD signals, ALERT and VR_HOT. Adjustable control of VCORE slew rate and voltage positioning round out the IMVP-7 features. In addition, the controllers’ CPU channel includes two high-current FET gate drivers to drive high-side and low-side N-channel FETs with exceptionally high speed and low switching loss.

TPS51650和TPS59650主要特性:

IMVP-7 Serial VID (SVID) Compliant

Supports CPU and GPU Outputs

CPU Channel One-Phase, Two-Phase, or Three-Phase

One-Phase or Two-Phase GPU Channel

Full IMVP-7 Mobile Feature Set Including Digital Current Monitor

8-Bit DAC with 0.250-V to 1.52-V Output Range

Optimized Efficiency at Light and Heavy Loads

VCORE Overshoot Reduction (OSR)

VCORE Undershoot Reduction (USR)

Accurate, Adjustable Voltage Positioning

8 Independent Frequency Selections per Channel (CPU/GPU

Patent Pending AutoBalance? Phase Balancing

Selectable 8-Level Current Limit

3-V to 28-V Conversion Voltage Range

Two Integrated Fast FET Drivers w/Integrated Boost FET

Selectable Address (TPS59650 only)

Small 6 × 6 , 48-Pin, QFN, PowerPAD Package

TPS51650和TPS59650應(yīng)用:

IMVP-7 VCORE Applications for Adapter, Battery, NVDC or 3-V, 5-V, and 12-V Rails

圖1.TPS51650和TPS59650方框圖


圖2.TPS51650帶電感DCR電流檢測(cè)的三相CPU,2相GPU應(yīng)用電路圖

圖3.帶電感DCR電流檢測(cè)的一相GPU應(yīng)用電路圖

圖4.帶電感DCR電流檢測(cè)的三相CPU應(yīng)用電路圖

圖5.帶電感DCR電流檢測(cè)的2相CPU應(yīng)用電路圖

圖6.帶電感DCR電流檢測(cè)的2相CPU和GPU不能的應(yīng)用電路圖

TPS59650EVM-753評(píng)估模塊

The TPS59650EVM-753 is designed to use a 9V-20V Input bus to produce 6 regulated outputs for IMVP7 SVID CPU/GPU Power System. The TPS59650EVM-753 is specially designed to demonstrate the TPS59650 full IMVP7 mobile feature while providing GUI communication programing and a number of test points to evaluate the static and dynamic performance of TPS59650.

TPS59650EVM-753評(píng)估模塊典型應(yīng)用:

? IMVP7 Vcore Applications for Adapter, Battery, NVDC or 3V/5V/12V rails

TPS59650EVM-753評(píng)估模塊主要特性:

? Complete solution for 9V-20V Input IMVP7 SVID Power System

? GUI communication to demonstrate full IMVP7 Mobile feature

? 3-Phase CPU Vcore can support up to 94A output current

? 2-Phase GPU Vcore can support up to 46A output current

? 8 Selectable Switching frequency for CPU and GPU power

? 8 Levels selectable current limit for CPU and GPU power

? Switches or Jumpers for each output enable

? On Board Dynamic Load for CPU, GPU Vcore and VCCIO output

? High efficiency and high density by using TI power block MOSFET

? Convenient test points for probing critical waveforms

? Eight Layer PCB with 1oz copper SLUU896–

圖8.TPS59650EVM-753電源系統(tǒng)框圖

圖9.TPS59650EVM-753外形圖
TPS59650EVM-753電性能指標(biāo):




圖10.TPS59650EVM-753電路圖(1)

圖11.TPS59650EVM-753電路圖(2)

圖12.TPS59650EVM-753電路圖(3)

圖13.TPS59650EVM-753電路圖(4)

圖14.TPS59650EVM-753電路圖(5)

圖15.TPS59650EVM-753電路圖(6)

圖16.TPS59650EVM-753電路圖(7)

圖17.TPS59650EVM-753電路圖(8)

圖18.TPS59650EVM-753電路圖(9)

圖19.TPS59650EVM-753電路圖(10)

圖20.TPS59650EVM-753電路圖(11)

圖21.TPS59650EVM-753電路圖(12)

圖22.TPS59650EVM-753電路圖(13)

圖23.TPS59650EVM-753電路圖(14)
TPS59650EVM-753材料清單:







圖24.TPS59650EVM-753 PCB元件布局圖:頂層

圖24.TPS59650EVM-753 PCB元件布局圖:底層
詳情請(qǐng)見:
http://www.ti.com/lit/ds/slusav7/slusav7.pdf

http://www.ti.com/lit/ug/sluu896/sluu896.pdf

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