新聞中心

EEPW首頁 > 嵌入式系統(tǒng) > 設(shè)計應(yīng)用 > ST SPEAr310嵌入330MHz MPU開發(fā)方案

ST SPEAr310嵌入330MHz MPU開發(fā)方案

作者: 時間:2012-10-22 來源:網(wǎng)絡(luò) 收藏

公司的是采用ARM926EJ-S處理器(高達(dá)333MHz)的,具有高性能的8路DMA,動態(tài)省功耗特性,可配置的外設(shè)功能,具有擴(kuò)展的連接特性,主要用在路由器,交換和網(wǎng)關(guān),遙控和計量集中器.本文介紹了主要特性,方框圖,采用的系統(tǒng)架構(gòu)圖以及評估板EVALSPEAr310主要特性,方框圖,電路圖,材料清單和PCB布局圖.

本文引用地址:http://butianyuan.cn/article/148324.htm

The SPEAr310 is a member of the SPEAr family of embedded s, optimized for telecom applications. It is based on the powerful ARM926EJ-S processor (up to 333 MHz), widely used in applications where high computation performance is required.

In addition, SPEAr310 has an MMU that allows virtual memory management -- making the system compliant with advanced operating systems, like Linux. It also offers 16 KB of data cache, 16 KB of instruction cache, JTAG and ETM (embedded trace macro-cell) for debug operations.

A full set of peripherals allows the system to be used in many applications, some typical applications being routers, switches and gateways as well as remote apparatus control and metering concentrators.

SPEAr310主要特性:

■ ARM926EJ-S 333 MHz core

■ High-performance 8-channel DMA

■ Dynamic power-saving features

■ Configurable peripheral functions multiplexed on 102 shared I/Os

■ Memory:

– 32 KB ROM and 8 KB internal SRAM

– LPDDR-333/DDR2-666 external memory interface

– Serial Flash Memory interface (SMI)

– Flexible static memory controller (FSMC) up to 16-bit data bus width, supporting NAND Flash

– External memory interface (EMI) up to 32- bit data bus width, supporting NOR Flash and FPGAs

■ Connectivity

– 2 x USB 2.0 Host

– USB 2.0 Device

– 1 x fast Ethernet MII port

– 4 x fast Ethernet SMII ports

– 1 x SSP Synchronous serial peripheral (SPI, Microwire or TI protocol) with 4 chip selects

– 1 x I2C

– 1 x fast IrDA interface

– 6 x UART interface

– 1x TDM/E1 HDLC interface with 128/32 timeslots per frame respectively

– 2x RS485 HDLC ports

■ Security

– C3 Cryptographic accelerator

■ Miscellaneous functions

– Integrated real time clock, watchdog, and system controller

– 8-channel 10-bit ADC, 1 Msps

– JPEG CODEC accelerator

– Six 16-bit general purpose timers with programmable prescaler, 4 capture inputs – Up to 102 GPIOs with interrupt capability

SPEAr310應(yīng)用:

The SPEAr310 embedded is configurable for a range of telecom and networking applications such as:

■ Routers, switches and gateways

■ Remote apparatus control

■ Metering concentrators

圖1.SPEAr310功能方框圖

圖2.采用SPEAr310的系統(tǒng)架構(gòu)圖

評估板EVALSPEAr310

EVALSPEAr310 - evaluation board for the SPEAr310

The EVALSPEAR310 board is equipped with one MII Ethernet port, four SMII Ethernet ports, six RS232 ports, two HDLC based RS485 ports and one E1/TDM port. Memory devices included are NAND Flash, parallel NOR Flash, serial NOR Flash, and I²C EEPROM.

圖3.評估板EVALSPEAr310外形圖

評估板EVALSPEAr310包括:

● SPEAr310 evaluation board

● AC adapter (output voltage 5 V)

● 2 plug adapters (USA/Europe)

● User manual

評估板EVALSPEAr310主要特性:

● SPEAr310 embedded MPU

● Up to 2 Gbits DDR2 333 MHz (std 128 Mbytes)

● Up to 1.5 Gbytes Parallel NOR Flash (std 16 Mbytes)

● Up to 16 Mbytes Serial NOR Flash memory (std 64 Mbytes)

● Up to 2 Gbits NAND Flash memory (std 64 Mbytes)

● 4 Kb Serial I2C EEPROM

● 4 Mb SPI Flash memory

● Two USB 2.0 full Host port channels

● One USB 2.0 high speed Device

● One 10/100 Ethernet port based on MII PHY

● Four 10/100 Ethernet port based on SMII PHY

● One E1, 2x BNC/RJ48(2.048 Mbits)

● Two HDLC RS485 DB9 ports (up to 4 MHz)

● One HDLC-TDM port (8 Mb, 128 TS)

● Six Serial ports (up to 115 kbaud)

● 8 ADC channels (10 bit, 1 Msamples)

● 6 GPIOs

● JTAG debug port

圖4.評估板EVALSPEAr310方框圖

評估板EVALSPEAr310材料清單:

電路圖符號相關(guān)文章:電路圖符號大全


路由器相關(guān)文章:路由器工作原理


路由器相關(guān)文章:路由器工作原理



上一頁 1 2 下一頁

評論


相關(guān)推薦

技術(shù)專區(qū)

關(guān)閉